Clang 7 assertion isRealLine

We are using ALUGrid in a CI setup with clang 7 and this base image and we get this assertion on all our ALUGrid programs. Gcc is fine.

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stokes_symdiff: /duneci/modules/dune-alugrid/dune/alugrid/impl/parallel/../serial/gitter_hexa_top.h:636: ALUGrid::Hedge1Top<ALUGrid::GitterBasisPll::ObjectsPll::Hedge1EmptyPll>::Hedge1Top(int, ALUGrid::Hedge1Top::myvertex_t *, ALUGrid::Hedge1Top::myvertex_t *) [A = ALUGrid::GitterBasisPll::ObjectsPll::Hedge1EmptyPll]: Assertion `isRealLine()' failed.
[hd-20c-6g-1h:25990] *** Process received signal ***
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Have you seen that before? How about I add a feature branch to dune-alugrid that changes your CI config to use this image and we see what happens?